The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 24, 2015
Filed:
May. 31, 2013
Stmicroelectronics, Inc., Coppell, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Globalfoundries Inc., Grand Cayman, KY;
Pietro Montanini, Albany, NY (US);
Raymond Joy, Mechanicville, NY (US);
Marta Mottura, Albany, NY (US);
Henry K. Utomo, Newburgh, NY (US);
STMicroelectronics, Inc., Coppell, TX (US);
International Business Machines Corporation, Armonk, NY (US);
GLOBALFOUNDRIES, Inc., Grand Cayman, KY;
Abstract
A method for fabricating enhanced-mobility pFET devices having channel lengths below 50 nm. Gates for pFETs may be patterned in dense arrays on a semiconductor substrate that includes shallow trench isolation (STI) structures. Partially-enclosed voids in the semiconductor substrate may be formed at source and drain regions for the gates, and subsequently filled with epitaxially-grown semiconductor that compressively stresses channel regions below the gates. Some of the gates (dummy gates) may extend over edges of the STI structures to prevent undesirable faceting of the epitaxial material in the source and drain regions.