The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2015

Filed:

Aug. 10, 2012
Applicants:

Chiu-te Lee, Hsinchu County, TW;

Ke-feng Lin, Taipei, TW;

Chih-chien Chang, Hsinchu, TW;

Wei-lin Chen, Changhua County, TW;

Chih-chung Wang, Hsinchu, TW;

Inventors:

Chiu-Te Lee, Hsinchu County, TW;

Ke-Feng Lin, Taipei, TW;

Chih-Chien Chang, Hsinchu, TW;

Wei-Lin Chen, Changhua County, TW;

Chih-Chung Wang, Hsinchu, TW;

Assignee:

United Microelectronics Corp., Science-Based Industrial Park, Hsin-Chu, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0653 (2013.01); H01L 29/0696 (2013.01); H01L 29/0878 (2013.01); H01L 29/4236 (2013.01); H01L 29/42376 (2013.01); H01L 29/66704 (2013.01); H01L 29/7825 (2013.01);
Abstract

A high voltage metal-oxide-semiconductor transistor device includes a substrate, at least an isolation structure formed in the substrate, a gate formed on the substrate, and a source region and a drain region formed in the substrate at respective sides of the gate. The isolation structure further includes a recess. The gate includes a first gate portion formed on a surface of the substrate and a second gate portion downwardly extending from the first gate portion and formed in the recess.


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