Semiconductor device and field effect transistor

Abstract

Provided is a semiconductor device in which the trade-off between the withstand voltage and the on-resistance is improved and the performance is increased. A semiconductor device comprises a substrate, a first n-type semiconductor layer', a second n-type semiconductor layer, a p-type semiconductor layer, and a third n-type semiconductor layer′, wherein the first n-type semiconductor layer′, the second n-type semiconductor layer, the p-type semiconductor layer, and the third n-type semiconductor layer′ are laminated at the upper side of the substratein this order. The drain electrodeis in ohmic-contact with the first n-type semiconductor layer′ and the source electrodeis in ohmic-contact with the third n-type semiconductor layer′. A gate electrodeis arranged so as to fill an opening portion to be filled that extends from the third n-type semiconductor layer′ to the second n-type semiconductor layer, and the gate electrodeis in contact with the upper surface of the second n-type semiconductor layer, the side surfaces of the p-type semiconductor layer, and the side surfaces of the third n-type semiconductor layer′. The second n-type semiconductor layerhas composition that changes from the drain electrodeside toward the source electrodeside in the direction perpendicular to the plane of the substrateand contains donor impurity.