The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 10, 2015
Filed:
Oct. 31, 2013
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Huang-Yu Chen, Zhudong Township, TW;
Yuan-Te Hou, Hsinchu, TW;
Chung-Min Fu, Chungli, TW;
Chung-Hsing Wang, Baoshan Township, TW;
Wen-Hao Chen, Hsin-Chu, TW;
Yi-Kan Cheng, Taipei, TW;
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Abstract
A received layout identifies a plurality of circuit components to be included in an integrated circuit (IC) layer for double patterning the layer using two photomasks, the layout including a plurality of first patterns to be included in the first photomask and at least one second pattern to be included in the second photomask. A selected one of the first patterns has first and second endpoints, to be replaced by a replacement pattern connecting the first endpoint to a third endpoint. At least one respective keep-out region is provided adjacent to each respective remaining first pattern except for the selected first pattern. Data are generated representing the replacement pattern, such that no part of the replacement pattern is formed in any of the keep-out regions. Data representing the remaining first patterns and the replacement pattern are output.