The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2015

Filed:

Feb. 11, 2011
Applicants:

Yong Zhang, Fremont, CA (US);

Derek C. Tao, Fremont, CA (US);

Dongsik Jeong, Fremont, CA (US);

Young Suk Kim, Fremont, CA (US);

Kuoyuan (Peter) Hsu, San Jose, CA (US);

Inventors:

Yong Zhang, Fremont, CA (US);

Derek C. Tao, Fremont, CA (US);

Dongsik Jeong, Fremont, CA (US);

Young Suk Kim, Fremont, CA (US);

Kuoyuan (Peter) Hsu, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/06 (2006.01); G11C 7/22 (2006.01); G11C 11/419 (2006.01);
U.S. Cl.
CPC ...
G11C 7/227 (2013.01); G11C 11/419 (2013.01);
Abstract

A memory has a tracking circuit for a read tracking operation. The memory includes a memory bit cell array, a tracking column, a tracking row, a sense amplifier row coupled to the memory bit cell array and the tracking row, and a sense amplifier enable logic. The memory further includes a tracking bit line coupled to the tracking column and the sense amplifier enable logic, and a tracking word line coupled to the tracking row and the sense amplifier enable logic. The tracking circuit is configured to track a column time delay along the tracking column before a row time delay along the tracking row.


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