The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2015

Filed:

Mar. 30, 2012
Applicants:

Sridharan Ranganathan, San Ramon, CA (US);

David J. Harriman, Portland, OR (US);

Anoop Mukker, Folsom, CA (US);

Satheesh Chellappan, Folsom, CA (US);

Karthi R. Vadivelu, Folsom, CA (US);

Shalini Sharma, Folsom, CA (US);

Zeeshan Sarwar, Folsom, CA (US);

Inventors:

Sridharan Ranganathan, San Ramon, CA (US);

David J. Harriman, Portland, OR (US);

Anoop Mukker, Folsom, CA (US);

Satheesh Chellappan, Folsom, CA (US);

Karthi R. Vadivelu, Folsom, CA (US);

Shalini Sharma, Folsom, CA (US);

Zeeshan Sarwar, Folsom, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/14 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4027 (2013.01);
Abstract

An interface for low power, high bandwidth communications between units in a device in provided herein. The interface comprises a USB 3.0 system interface and a SuperSpeed inter-chip (SSIC) protocol adaptor configured to facilitate communications between the USB 3.0 system interface and an M-PHY interface.


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