The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2015

Filed:

Jan. 17, 2013
Applicant:

Sandisk Technologies Inc., Plano, TX (US);

Inventors:

Man Lung Mui, Fremont, CA (US);

Yosuke Kato, Kanagawa, JP;

Hao Thai Nguyen, San Jose, CA (US);

Seungpil Lee, San Ramon, CA (US);

Assignee:

SanDisk Technologies Inc., Plano, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 16/24 (2006.01); G11C 16/06 (2006.01); G11C 7/06 (2006.01); G11C 11/56 (2006.01); G11C 16/26 (2006.01); G11C 16/34 (2006.01); G11C 11/4091 (2006.01);
U.S. Cl.
CPC ...
G11C 16/24 (2013.01); G11C 16/06 (2013.01); G11C 11/4091 (2013.01); G11C 7/067 (2013.01); G11C 11/5642 (2013.01); G11C 16/26 (2013.01); G11C 16/3436 (2013.01);
Abstract

A compact and versatile high speed sense amplifier suitable for use in non-volatile memory circuits is presented. The sense amp circuit uses one power supply level for the bit line driving path and a second supply level for a data latch of the sense amp. The latch's supply level is of a high level that used for driving the bit lines and can be provided by a charge pump. The sense amp need use only NMOS devices for its analog path. For balancing performance and current consumption, the sense amp also includes an additional latch to support a 'hybrid lockout' sensing mode, where in a verify operation a read-lockout is used between different data states, but not between the low and high quick pass write (QPW) verifies.


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