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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8946030 B1

PDFFull Text
Expired
Date of Patent:
Feb. 03, 2015

Filed:

Dec. 17, 2013

Method for forming dummy gate

Applicant:

Tokyo Electron Limited, Tokyo, JP;

Inventors:

Motoki Noro, Hsin-Chu, TW;

Tai-Chuan Lin, Hsin-Chu, TW;

Shinji Kawada, Hsin-Chu, TW;

Assignee:

Tokyo Electron Limited, Tokyo, JP;

Attorney:

Rothwell, Figg, Ernst & Manbeck, P.C.

Primary Examiner:

Olik Chaudhuri

Assistant Examiner:

Christine Enad

Int. Cl.
CPC ...
H01L 21/311 (2006.01); H01L 21/8234 (2006.01); H01L 27/088 (2006.01); H01L 29/49 (2006.01); H01L 29/78 (2006.01); H01L 21/3213 (2006.01); H01L 29/66 (2006.01); H01J 37/32 (2006.01);
U.S. Cl.
CPC ...
H01L 21/32137 (2013.01); H01L 29/66545 (2013.01); H01J 37/32082 (2013.01); H01J 37/32192 (2013.01);
Abstract

Disclosed is a method of forming a dummy gate in manufacturing a field effect transistor. The method includes a first process of exposing a workpiece having a polycrystalline silicon layer to plasma of HBr gas, and a second process of further exposing the workpiece to the plasma of HBr gas after the first process. The first process includes etching the polycrystalline silicon layer to form a dummy semiconductor part having a pair of side surfaces from the polycrystalline silicon layer, and forming a protection film based on a by-product of etching on the pair of side surfaces in such a manner that the thickness of the protection film becomes smaller toward a lower end of the dummy semiconductor part.

Find Patent Forward Citations

Noro, Motoki. (2015). Method for forming dummy gate (U.S. Patent No. 8946030). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8946030

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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