The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 06, 2015

Filed:

Oct. 22, 2013
Applicant:

Aplus Flash Technology, Inc, San Jose, CA (US);

Inventors:

Peter Wung Lee, Saratoga, CA (US);

Hsing-Ya Tsao, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 14/00 (2006.01);
U.S. Cl.
CPC ...
G11C 14/0063 (2013.01); G11C 14/00 (2013.01);
Abstract

One or more embodiments of 8T NVSRAM cell are provided for improving NVSRAM memory architecture with reduced cell size as opposed to the prior art of 12T NVSRAM cell. This novel 8T NVSRAM cell uses one step Write operation under either a FN-channel write scheme to increase a paired flash transistor Vt values in positive direction with a desired ΔVt12 ≧1V or a FN-edge write scheme to decrease the Vt values in negative direction with a similar desired ΔVt12≧1V to write the ΔVt12 into the paired flash transistors within 1-10 ms without requiring a pre-erase step. There is no need of Program-Inhibit Voltage (SBPI) to inhibit non-select flash transistor from programming. In addition, this 8T NVSRAM cell uses DRAM-like charge-sensing scheme to detect the ΔV on Q and QB nodes of SRAM in which is coupled and generated from the ΔVt12 stored in MC1 and MC2 flash transistors.


Find Patent Forward Citations

Loading…