The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 30, 2014
Filed:
Nov. 30, 2011
Chan-lon Yang, Taipei, TW;
Ching-i LI, Tainan, TW;
Ger-pin Lin, New Taipei, TW;
I-ming Lai, Kaohsiung, TV;
Yun-san Huang, New Taipei, TW;
Chin-i Liao, Tainan, TW;
Chin-cheng Chien, Tainan, TW;
Chan-Lon Yang, Taipei, TW;
Ching-I Li, Tainan, TW;
Ger-Pin Lin, New Taipei, TW;
I-Ming Lai, Kaohsiung, TV;
Yun-San Huang, New Taipei, TW;
Chin-I Liao, Tainan, TW;
Chin-Cheng Chien, Tainan, TW;
United Microelectronics Corp., Science-Based Industrial Park, Hsin-Chu, TW;
Abstract
First, a substrate with a recess is provided in a semiconductor process. Second, an embedded SiGe layer is formed in the substrate. The embedded SiGe layer includes an epitaxial SiGe material which fills up the recess. Then, a pre-amorphization implant (PAI) procedure is carried out on the embedded SiGe layer to form an amorphous region. Next, a source/drain implanting procedure is carried out on the embedded SiGe layer to form a source doping region and a drain doping region. Later, a source/drain annealing procedure is carried out to form a source and a drain in the substrate. At least one of the pre-amorphization implant procedure and the source/drain implanting procedure is carried out in a cryogenic procedure below −30° C.