The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 23, 2014
Filed:
Dec. 06, 2011
Kah Wee Gan, Singapore, SG;
Yaohuang Huang, Singapore, SG;
Yonggang Jin, Singapore, SG;
STMicroelectronics Pte Ltd., Singapore, SG;
Abstract
A process for manufacturing a 3D or PoP semiconductor package includes forming a redistribution layer on a reconstituted wafer, then laser drilling a plurality of apertures in the reconstituted wafer, extending from an outer surface of the reconstituted wafer to intersect electrical traces in the first redistribution layer. A solder ball is then positioned adjacent to an opening of each of the apertures. The solder balls are melted and allowed to fill the apertures, making contact with the respective electrical traces and forming a plurality of solder columns. The outer surface of the reconstituted wafer is then planarized, and a second redistribution layer is formed on the planarized surface. The solder columns serve as through-vias, electrically coupling the first and second redistribution layers on opposite sides of the reconstituted wafer.