The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 23, 2014

Filed:

Aug. 26, 2013
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Ching-Li Yang, Ping-Tung Hsien, TW;

Chien-Li Kuo, Hsinchu, TW;

Chung-Sung Chiang, Kaohsiung, TW;

Yu-Han Tsai, Kaohsiung, TW;

Chun-Wei Kang, Kaohsiung, TW;

Assignee:

United Microelectronics Corp., Science-Based Industrial Park, Hsin-Chu, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 29/40 (2006.01); H01L 21/768 (2006.01); H01L 23/552 (2006.01); H01L 23/538 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76877 (2013.01); H01L 21/76802 (2013.01); H01L 23/552 (2013.01); H01L 23/5384 (2013.01); H01L 2225/06541 (2013.01); H01L 2924/3025 (2013.01); H01L 21/76898 (2013.01); H01L 21/76897 (2013.01);
Abstract

A method for forming a through silicon via for signal and a shielding structure is provided. A substrate is provided and a region is defined on the substrate. A radio frequency (RF) circuit is formed in the region on the substrate. A through silicon trench (TST) and a through silicon via (TSV) are formed simultaneously, wherein the TST encompasses the region to serve as a shielding structure for the RF circuit. A metal interconnection system is formed on the substrate, wherein the metal interconnection system comprises a connection unit that electrically connects the TSV to the RF circuit to provide a voltage signal.


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