The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 23, 2014

Filed:

Jun. 06, 2013
Applicant:

Fujitsu Semiconductor Limited, Yokohama-shi, Kanagawa, JP;

Inventors:

Hirosato Ochimizu, Kuwana, JP;

Atsuhiro Tsukune, Inagi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01); H01L 21/768 (2006.01); H01L 23/48 (2006.01); H01L 23/485 (2006.01); H01L 23/522 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 23/485 (2013.01); H01L 23/522 (2013.01); H01L 25/0657 (2013.01); H01L 21/76802 (2013.01); H01L 21/76807 (2013.01); H01L 21/76816 (2013.01); H01L 21/76846 (2013.01); H01L 21/76849 (2013.01); H01L 21/76877 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06541 (2013.01); H01L 2224/0382 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/06181 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/11009 (2013.01); H01L 2225/06565 (2013.01); H01L 2225/06544 (2013.01); H01L 2224/05572 (2013.01);
Abstract

A transistor formed on a semiconductor substrate is covered with a first insulating film, and first conductive vias which pierce the first insulating film and which reach the transistor and a second conductive via which pierces the first insulating film and which reaches an inside of the semiconductor substrate are formed. After the formation of the first conductive vias and the second conductive via, a second insulating film is formed over the first insulating film. Conducive portions connected to the first conductive vias leading to the transistor and a conductive portion connected to the second conductive via which reaches the inside of the semiconductor substrate are formed in the second insulating film. By doing so, a multilayer interconnection is formed.


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