The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 2014

Filed:

Dec. 28, 2012
Applicants:

Harry Muljono, San Ramon, CA (US);

Donald L. Faw, Hillsboro, CA (US);

Charlie Lin, Cupertino, CA (US);

Stefan Rusu, Santa Clara, CA (US);

Inventors:

Harry Muljono, San Ramon, CA (US);

Donald L. Faw, Hillsboro, CA (US);

Charlie Lin, Cupertino, CA (US);

Stefan Rusu, Santa Clara, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 7/02 (2006.01);
U.S. Cl.
CPC ...
H03K 7/02 (2013.01);
Abstract

Techniques and mechanisms for configuring logic to implement a signal modulation. In an embodiment, the logic includes a finite impulse response (FIR) module comprising circuitry. The selection circuitry may be operable to concurrently receive signals from latch circuitry of the FIR module and, based on the signals, to select an input group of the selection circuitry and to output a voltage identifier. In another embodiment, configuration logic is operable to set an operational mode which determines a total number of concurrent input signals, received by the FIR module, which the FIR module will use to select an input group for generating an output representing a voltage level.


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