The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 25, 2014

Filed:

May. 08, 2013
Applicants:

Chorng-ping Chang, Saratoga, CA (US);

Bingxi Wood, Stanford, CA (US);

Er-xuan Ping, Fremont, CA (US);

Inventors:

Chorng-Ping Chang, Saratoga, CA (US);

Bingxi Wood, Stanford, CA (US);

Er-Xuan Ping, Fremont, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76889 (2013.01); H01L 23/498 (2013.01);
Abstract

A method of fabricating a self-aligned buried bit line in a structure which makes up a portion of a vertical channel DRAM. The materials and processes used enable self-alignment of elements of the buried bit line during the fabrication process. In addition, the materials and processes used enable for formation of individual DRAM cells which have a buried bit line width which is 16 nm or less.


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