The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 11, 2014

Filed:

Mar. 27, 2012
Applicants:

Michael Todd Wyant, Dallas, TX (US);

Patricia Sabran Conde, Pasig, PH;

Vikas Gupta, Dallas, TX (US);

Rajiv Dunne, Murphy, TX (US);

Emerson Mamaril Enipin, Angeles, PH;

Inventors:

Michael Todd Wyant, Dallas, TX (US);

Patricia Sabran Conde, Pasig, PH;

Vikas Gupta, Dallas, TX (US);

Rajiv Dunne, Murphy, TX (US);

Emerson Mamaril Enipin, Angeles, PH;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 23/495 (2006.01); H05K 5/02 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49524 (2013.01); H01L 23/49555 (2013.01);
Abstract

A method of making a stacked semiconductor package having at least a leadframe, a first die mounted above and soldered to the lead frame and a first clip mounted above and soldered to the first die. The method includes positioning the leadframe, first die and first clip in a vertically stacked relationship and nonsolderingly locking the first clip in laterally nondisplaceble relationship with the leadframe. A stacked semiconductor package and an intermediate product produced in making a stacked semiconductor package are also disclosed.


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