The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 04, 2014

Filed:

Dec. 20, 2011
Applicants:

Nasser A. Kurd, Portland, OR (US);

Vaughn J. Grossnickle, Beaverton, OR (US);

Inventors:

Nasser A. Kurd, Portland, OR (US);

Vaughn J. Grossnickle, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01); G06F 1/32 (2006.01); G06F 1/08 (2006.01); H03L 7/08 (2006.01);
U.S. Cl.
CPC ...
H03L 7/08 (2013.01); G06F 1/3296 (2013.01); G06F 1/08 (2013.01);
Abstract

Apparatuses, systems, and a method for providing a PLL architecture with scalable power are described. In one embodiment, a system includes one or more processing units having a voltage regulator to generate a controllably adjustable supply voltage for a phase-locked loop (PLL) circuit coupled to the voltage regulator. The PLL circuit compares a phase and frequency of the reference clock signal to a phase and frequency of a generated feedback clock signal and generates an output signal based on the comparison. A tracking unit adjusts the controllably adjustable supply voltage based on an operating frequency of the system.


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Kurd, Nasser. (2014). System and method for scaling power of a phase-locked loop architecture (U.S. Patent No. 8878579). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8878579

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