The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 04, 2014
Filed:
May. 31, 2012
Applicants:
Chun Hua Chang, Zhubei, TW;
Der-chyang Yeh, Hsinchu, TW;
Kuang-wei Cheng, Hsinchu, TW;
Yuan-hung Liu, Hsinchu, TW;
Shang-yun Hou, Jubei, TW;
Wen-chih Chiou, Miaoli, TW;
Shin-puu Jeng, Hsinchu, TW;
Inventors:
Chun Hua Chang, Zhubei, TW;
Der-Chyang Yeh, Hsinchu, TW;
Kuang-Wei Cheng, Hsinchu, TW;
Yuan-Hung Liu, Hsinchu, TW;
Shang-Yun Hou, Jubei, TW;
Wen-Chih Chiou, Miaoli, TW;
Shin-Puu Jeng, Hsinchu, TW;
Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/00 (2006.01); H01L 21/02 (2006.01); H01L 29/02 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02 (2013.01); H01L 29/02 (2013.01);
Abstract
Capacitor designs for substrates, such as interposers, and methods of manufacture thereof are disclosed. A through via is formed in the interposer, and a capacitor is formed between a lower level metallization layer and a higher level metallization layer. The capacitor may be, for example, a planar capacitor with dual capacitor dielectric layers.