The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 04, 2014

Filed:

Apr. 13, 2011
Applicants:

Peter J. Hopper, San Jose, CA (US);

Alexei Sadovnikov, Sunnyvale, CA (US);

William French, San Jose, CA (US);

Erika Mazotti, San Martin, CA (US);

Richard Wendell Foote, Jr., Burleson, TX (US);

Punit Bhola, South Portland, ME (US);

Vladislav Vashchenko, Palo Alto, CA (US);

Inventors:

Peter J. Hopper, San Jose, CA (US);

Alexei Sadovnikov, Sunnyvale, CA (US);

William French, San Jose, CA (US);

Erika Mazotti, San Martin, CA (US);

Richard Wendell Foote, Jr., Burleson, TX (US);

Punit Bhola, South Portland, ME (US);

Vladislav Vashchenko, Palo Alto, CA (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
Abstract

A DMOS transistor with a lower on-state drain-to-source resistance and a higher breakdown voltage utilizes a slanted super junction drift structure that lies along the side wall of an opening with the drain region at the bottom of the opening and the source region near the top of the opening.


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