The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 04, 2014

Filed:

Jun. 01, 2012
Applicants:

Chung-ming Wang, Chiayi, TW;

Yu Lun Liu, Beidou Township, Changhua County, TW;

Chia-chu Liu, Shin-Chu, TW;

Ya Hui Chang, Hsinchu, TW;

Kuei-shun Chen, Hsin-Chu, TW;

Inventors:

Chung-Ming Wang, Chiayi, TW;

Yu Lun Liu, Beidou Township, Changhua County, TW;

Chia-Chu Liu, Shin-Chu, TW;

Ya Hui Chang, Hsinchu, TW;

Kuei-Shun Chen, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 21/4763 (2006.01); H01L 29/786 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 29/78606 (2013.01); H01L 27/1292 (2013.01);
Abstract

A method of forming a integrated circuit pattern. The method includes forming gate stacks on a substrate, two adjacent gate stacks of the gate stacks being spaced away by a dimension G; forming a nitrogen-containing layer on the gate stacks and the substrate; forming a dielectric material layer on the nitrogen-containing layer, the dielectric material layer having a thickness T substantially less than G/2; coating a photoresist layer on the dielectric material layer; and patterning the photoresist layer by a lithography process.


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