Nonvolatile memory devices, erasing methods thereof and memory systems including the same

Abstract

Provided are erase methods for a memory device which includes a substrate and multiple cell strings provided on the substrate, each cell string including multiple cell transistors stacked in a direction perpendicular to the substrate. The erase method includes applying a ground voltage to a ground selection line connected with ground selection transistors of the cell strings; applying a ground voltage to string selection lines connected with selection transistors of the cell strings; applying a word line erase voltage to word lines connected with memory cells of the cell strings; applying an erase voltage to the substrate; controlling a voltage of the ground selection line in response to applying of the erase voltage; and controlling voltages of the string selection lines in response to the applying of the erase voltage.