The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2014

Filed:

Jun. 03, 2011
Applicants:

Sehat Sutardja, Los Altos Hills, CA (US);

Shiann-ming Liou, Campbell, CA (US);

Huahung Kao, San Jose, CA (US);

Inventors:

Sehat Sutardja, Los Altos Hills, CA (US);

Shiann-Ming Liou, Campbell, CA (US);

Huahung Kao, San Jose, CA (US);

Assignee:

Marvell World Trade Ltd., St. Michael, BB;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/31 (2006.01); H01L 21/683 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/49 (2013.01); H01L 2924/01013 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/014 (2013.01); H01L 2221/68381 (2013.01); H01L 2221/68345 (2013.01); H01L 2924/01014 (2013.01); H01L 2224/49175 (2013.01); H01L 2924/15311 (2013.01); H01L 23/3128 (2013.01); H01L 21/6835 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48237 (2013.01); H01L 24/48 (2013.01); H01L 24/32 (2013.01); H01L 21/568 (2013.01); H01L 2224/85424 (2013.01); H01L 2924/01006 (2013.01); H01L 2224/49171 (2013.01); H01L 2224/48227 (2013.01); H01L 2924/01082 (2013.01); H01L 2224/48247 (2013.01); H01L 2924/01005 (2013.01); H01L 2924/078 (2013.01); H01L 24/29 (2013.01); H01L 2224/85447 (2013.01); H01L 2924/01033 (2013.01); H01L 2224/49433 (2013.01);
Abstract

Embodiments of the present disclosure provide an electronic package assembly comprising a solder mask layer, the solder mask layer having at least one opening, and a plurality of pads coupled to the solder mask layer, wherein at least one pad of the plurality of pads includes (i) a first side, (ii) a second side, the first side being disposed opposite to the second side, (iii) a terminal portion and (iv) an extended portion, wherein the first side at the terminal portion is configured to receive a package interconnect structure through the at least one opening in the solder mask layer, the package interconnect structure to route electrical signals between a die and another electronic device that is external to the electronic package assembly, and wherein the second side at the extended portion is configured to receive one or more electrical connections from the die. Other embodiments may be described and/or claimed.


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