The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 30, 2014

Filed:

Sep. 11, 2013
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Hartmut Ruelke, Dresden, DE;

Katja Huy, Dresden, DE;

Markus Lenski, Dresden, DE;

Assignee:

GLOBALFOUNDRIES Inc., Grand Cayman, KY;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 21/336 (2006.01); H01L 21/8238 (2006.01); H01L 21/66 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 21/318 (2006.01);
U.S. Cl.
CPC ...
H01L 22/10 (2013.01); H01L 21/823807 (2013.01); H01L 29/7843 (2013.01); H01L 21/823864 (2013.01); H01L 29/6656 (2013.01); H01L 21/3185 (2013.01); H01L 29/6659 (2013.01);
Abstract

By reducing a deposition rate and maintaining a low bias power in a plasma atmosphere, a spacer layer, for example a silicon nitride layer, may be deposited that exhibits tensile stress. The amount of tensile stress is controllable within a wide range, thereby providing the potential for forming sidewall spacer elements that modify the charge carrier mobility and thus the conductivity of the channel region of a field effect transistor.


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