The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 16, 2014

Filed:

Feb. 16, 2013
Applicant:

Stats Chippac, Ltd., Singapore, SG;

Inventors:

DaeWook Yang, Kyunggi-do, KR;

SeungWon Kim, Kyunggi-do, KR;

MinJung Kim, Kyunggi-do, KR;

Assignee:

STATS ChipPAC, Ltd., Singapore, SG;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/02 (2006.01); H01L 23/34 (2006.01); H01L 21/44 (2006.01); H01L 23/31 (2006.01); H01L 23/538 (2006.01); H01L 23/28 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 23/28 (2013.01); H01L 2225/06582 (2013.01); H01L 2224/73204 (2013.01); H01L 23/3135 (2013.01); H01L 23/5384 (2013.01); H01L 2224/97 (2013.01); H01L 2924/13091 (2013.01); H01L 21/561 (2013.01); H01L 23/562 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/131 (2013.01); H01L 2224/81815 (2013.01); H01L 2225/06517 (2013.01); H01L 2224/16146 (2013.01); H01L 2224/81191 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06548 (2013.01); H01L 2224/16227 (2013.01); H01L 25/50 (2013.01); H01L 2924/01322 (2013.01); H01L 2924/00013 (2013.01); H01L 2224/17181 (2013.01); H01L 23/3128 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/48091 (2013.01); H01L 25/0657 (2013.01);
Abstract

A semiconductor device has a substrate with a plurality of conductive vias formed through the substrate and conductive layer formed over the substrate. A first encapsulant is deposited over the substrate outside a die attach area of the substrate. The first encapsulant surrounds each die attach area over the substrate and the die attach area is devoid of the first encapsulant. A channel connecting adjacent die attach areas is also devoid of the first encapsulant. A first semiconductor die is mounted over the substrate within the die attach area after forming the first encapsulant. A second semiconductor die is mounted over the first die within the die attach area. An underfill material can be deposited under the first and second die. A second encapsulant is deposited over the first and second die and first encapsulant. The first encapsulant reduces warpage of the substrate during die mounting.


Find Patent Forward Citations

Loading…