The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 16, 2014

Filed:

Jun. 18, 2012
Applicants:

Ming-shun Hsu, Miaoli County, TW;

Wen-peng Hsu, New Taipei, TW;

Ke-feng Lin, Taipei, TW;

Min-hsuan Tsai, Tainan, TW;

Chih-chung Wang, Hsinchu, TW;

Inventors:

Ming-Shun Hsu, Miaoli County, TW;

Wen-Peng Hsu, New Taipei, TW;

Ke-Feng Lin, Taipei, TW;

Min-Hsuan Tsai, Tainan, TW;

Chih-Chung Wang, Hsinchu, TW;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01);
U.S. Cl.
CPC ...
Abstract

A transistor device and a manufacturing method thereof are provided. The transistor device includes a substrate, a first well, a second well, a shallow trench isolation (STI), a source, a drain and a gate. The first well is disposed in the substrate. The second well is disposed in the substrate. The STI is disposed in the second well. The STI has at least one floating diffusion island. The source is disposed in the first well. The drain is disposed in the second well. The electric type of the floating diffusion island is different from or the same with that of the drain. The gate is disposed above the first well and the second well, and partially overlaps the first well and the second well.


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