The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 16, 2014
Filed:
Nov. 23, 2010
Yoichiro Kawamura, Gifu, JP;
Shigeki Sawa, Gifu, JP;
Katsuhiko Tanno, Gifu, JP;
Hironori Tanaka, Gifu, JP;
Naoaki Fujii, Gifu, JP;
Yoichiro Kawamura, Gifu, JP;
Shigeki Sawa, Gifu, JP;
Katsuhiko Tanno, Gifu, JP;
Hironori Tanaka, Gifu, JP;
Naoaki Fujii, Gifu, JP;
Ibiden Co., Ltd., Ogaki-shi, JP;
Abstract
A method for manufacturing a printed wiring board including providing a structure having a wiring substrate having a conductor circuit, a build-up multilayer structure formed over the wiring substrate and having an outermost conductor circuit and an outermost insulative resin layer, and a solder resist layer formed over the outermost conductor circuit and outermost insulative resin layer and having openings with an opening diameter D for mounting electronic elements, forming conductor pads with a pitch of about 200 pm or less on the outermost conductor circuit in the openings of the solder resist layer, respectively, and forming solder bumps with a height H from a surface of the solder resist layer on the conductor pads on the conductor pads, respectively, such that a ratio H/D is about 0.55 to about 1.0.