The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 09, 2014

Filed:

Jan. 28, 2013
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Amit Kundu, Hsinchu, TW;

Jaw-Juinn Horng, Hsinchu, TW;

Yung-Chow Peng, Hsinchu, TW;

Shih-Cheng Yang, Zhubei, TW;

Chung-Kai Lin, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 9/455 (2006.01); G06F 17/10 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5068 (2013.01);
Abstract

A system and method for designing integrated circuits and predicting current mismatch in a metal oxide semiconductor (MOS) array. A first subset of cells in the MOS array is selected and current measured for each of these cells. Standard deviation of current for each cell in the first subset of cells is determined with respect to current of a reference cell. Standard deviation of local variation can be determined using the determined standard deviation of current for one or more cells in the first subset. Standard deviations of variation induced by, for example, poly density gradient effects, in the x and/or y direction of the array can then be determined and current mismatch for any cell in the array determined therefrom.


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