The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 26, 2014
Filed:
Mar. 24, 2010
Koji Motomura, Osaka, JP;
Hideki Eifuku, Osaka, JP;
Tadahiko Sakai, Osaka, JP;
Panasonic Corporation, Osaka, JP;
Abstract
Disclosed are an electronic component mounting system and an electronic component mounting method capable of ensuring high connection reliability. An electronic component mounting system () includes a component mounting section which includes a solder printing device (M), a coating/inspection device (M), a component mounting device (M), and a reflow device (M), and mounts an electronic component on a main substrate (), and a substrate connection section which includes a bonding material supply/substrate mounting device (M) and a thermal compression device (M), and connects the main substrate () with the component mounted thereon and a module substrate () to each other. A configuration is used in which a substrate conveying mechanism () of the reflow device (M) on the lowermost stream side of the component mounting section and a substrate conveying mechanism () of the bonding material supply/substrate mounting device (M) of the substrate connection section are connected directly to each other or are linked to each other by a conveying path through another conveying means. Thus, the main substrate () after reflow can be transferred immediately to a substrate connection step, and the generation of a void in the connection portion due to moisture being evaporated in the substrate connection step can be excluded.