The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 26, 2014
Filed:
Oct. 05, 2012
Fei Company, Hillsboro, OR (US);
Bart Jozef Janssen, Eindhoven, NL;
Gerrit Cornelis van Hoften, Veldhoven, NL;
Uwe Luecken, Eindhoven, NL;
FEI Company, Hillsboro, OR (US);
Abstract
To avoid reset noise in a CMOS chip for direct particle counting, it is known to use Correlative Double Sampling: for each signal value, the pixel is sampled twice: once directly after reset and once after an integration time. The signal is then determined by subtracting the reset value from the later acquired value, and the pixel is reset again. In some embodiments of the invention, the pixel is reset only after a large number of read-outs. Applicants realized that typically a large number of events, typically approximately 10, are needed to cause a full pixel. By either resetting after a large number of images, or when one pixel of the image shows a signal above a predetermined value (for example× the full-well capacity), the image speed can be almost doubled compared to the prior art method, using a reset after acquiring a signal.