The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 19, 2014
Filed:
Dec. 20, 2011
Dae Woong Lee, Yongin-si, KR;
Yu Gyeong Hwang, Seoul, KR;
Jae Hyun Son, Gwangju, KR;
Tae Min Kang, Seoul, KR;
Chul Keun Yoon, Suwon-si, KR;
Byoung DO Lee, Incheon, KR;
Yu Hwan Kim, Icheon, KR;
Dae Woong Lee, Yongin-si, KR;
Yu Gyeong Hwang, Seoul, KR;
Jae Hyun Son, Gwangju, KR;
Tae Min Kang, Seoul, KR;
Chul Keun Yoon, Suwon-si, KR;
Byoung Do Lee, Incheon, KR;
Yu Hwan Kim, Icheon, KR;
SK Hynix Inc., Gyeonggi-do, KR;
Abstract
A stack package having a plurality of stacked chips includes first voltage dropping units respectively formed in the plurality of chips, the first voltage dropping units are electrically coupled by a first line; second voltage dropping units respectively formed in the plurality of chips, the second dropping units are electrically coupled by a second line; first signal generation units respectively formed in the plurality of chips, each of the first signal generation units is connected to an output node of the first voltage dropping units, respectively; and second signal generation units respectively formed in the plurality of chips, each of the second signal generation units is connected to an input node of the second voltage dropping units, respectively.