The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 19, 2014
Filed:
Sep. 28, 2012
Xilinx, Inc., San Jose, CA (US);
Yuqing Gong, San Jose, CA (US);
Henley Liu, San Jose, CA (US);
Myongseob Kim, Pleasanton, CA (US);
Suresh P. Parameswaran, Fremont, CA (US);
Cheang-Whang Chang, Mountain View, CA (US);
Boon Y. Ang, Sunnyvale, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
An integrated circuit (IC) comprises routing circuitry including a plurality of signal line segments in routing layers of the IC, and a plurality of micro-bump contacts coupled to the routing circuitry. The IC includes a plurality of test circuits coupled to respective subsets of the plurality of signal line segments. Each test circuit is configured to connect micro-bump contacts in the respective subset to form first and second sets of daisy chains. Each test circuit is configured to test the first and second sets of daisy chains for open circuits and test for short circuits between the first and second sets of daisy chains. Each test circuit is configured to determine the locations of detected open circuits and determine the locations of detected short circuits.