The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 12, 2014
Filed:
May. 31, 2012
Alaa R. Alameldeen, Beaverton, OR (US);
Ilya Wagner, Hillsboro, OR (US);
Zeshan A. Chishti, Beaverton, OR (US);
Wei Wu, Portland, OR (US);
Christopher B. Wilkerson, Portland, OR (US);
Alaa R. Alameldeen, Beaverton, OR (US);
Ilya Wagner, Hillsboro, OR (US);
Zeshan A. Chishti, Beaverton, OR (US);
Wei Wu, Portland, OR (US);
Christopher B. Wilkerson, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Embodiments include a method and system of dynamically allocatable memory error mitigation. In one embodiment, a system applies an error mitigation mechanism to one of multiple groups of memory units, wherein the one group is in active use during an error test of a second group of memory units. The system deactivates and tests the second group of memory units for errors. In response to detecting an error in a memory unit of the second group, the system applies, to the memory unit of the second group having the error, the error mitigation mechanism for active use. The system then activates the second group of memory units with the error mitigation mechanism applied to the memory unit of the second group having the error.