The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 29, 2014

Filed:

Jan. 21, 2011
Applicants:

Jason E. Cummings, Smithfield, NC (US);

Balasubramanian S. Haran, Watervliet, NY (US);

Hemanth Jagannathan, Guilderland, NY (US);

Sanjay Mehta, Niskayuna, NY (US);

Inventors:

Jason E. Cummings, Smithfield, NC (US);

Balasubramanian S. Haran, Watervliet, NY (US);

Hemanth Jagannathan, Guilderland, NY (US);

Sanjay Mehta, Niskayuna, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/76 (2006.01); H01L 21/762 (2006.01); H01L 21/02 (2006.01); H01L 21/8234 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76224 (2013.01); H01L 21/02107 (2013.01); H01L 21/823481 (2013.01); H01L 29/0649 (2013.01);
Abstract

A shallow trench isolation region is provided in which void formation is substantially or totally eliminated therefrom. The shallow trench isolation mitigates active shorts between two active regions of a semiconductor substrate. The shallow trench isolation region includes a bilayer liner which is present on sidewalls and a bottom wall of a trench that is formed in a semiconductor substrate. The bilayer liner of the present disclosure includes, from bottom to top, a shallow trench isolation liner, e.g., a semiconductor oxide and/or nitride, and a high k liner, e.g., a dielectric material having a dielectric constant that is greater than silicon oxide.


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