The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 15, 2014

Filed:

Oct. 31, 2012
Applicants:

Yasushi Inagaki, Ibi-gun, JP;

Motoo Asai, Ibi-gun, JP;

Dongdong Wang, Ibi-gun, JP;

Hideo Yabashi, Ibi-gun, JP;

Inventors:

Yasushi Inagaki, Ibi-gun, JP;

Motoo Asai, Ibi-gun, JP;

Dongdong Wang, Ibi-gun, JP;

Hideo Yabashi, Ibi-gun, JP;

Seiji Shirai, Ibi-gun, JP;

Assignee:

Ibiden Co., Ltd., Ogaki-shi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/16 (2006.01);
U.S. Cl.
CPC ...
Abstract

A printed circuit board includes an accommodating layer, chip capacitor devices accommodated in the accommodating layer, and a buildup structure formed on the accommodating layer such that the buildup structure covers the chip capacitor devices in the accommodating layer. The buildup structure has mounting conductor structures positioned to mount an IC chip device on a surface of the buildup structure such that the IC chip device is mounted directly over the chip capacitor devices, each of the chip capacitor devices has a dielectric body having a surface facing the buildup structure, a first electrode formed on the dielectric body and extending on the surface of the dielectric body, and a second electrode formed on the dielectric body and extending on the surface of the dielectric body, and the dielectric body is interposed between the first electrode and the second electrode.


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