The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 2014

Filed:

Aug. 30, 2012
Applicants:

Nobuhito Kuge, Tokyo, JP;

Naoki Yasuda, Kanagawa-ken, JP;

Yoshiaki Fukuzumi, Kanagawa-ken, JP;

Tomoko Fujiwara, Kanagawa-ken, JP;

Inventors:

Nobuhito Kuge, Tokyo, JP;

Naoki Yasuda, Kanagawa-ken, JP;

Yoshiaki Fukuzumi, Kanagawa-ken, JP;

Tomoko Fujiwara, Kanagawa-ken, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 21/3205 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor memory device comprising a stacked unit, a semiconductor pillar, a charge storage layer, and a non-insulating film. The stacked unit includes first conductive layers and first insulating layers which are stacked alternately. The semiconductor pillar passes through the stacked body and the semiconductor pillar has a tubular structure. The charge storage layer is provided between the semiconductor pillar and each of the first conductive layers. The non-insulating film is provided inside the tubular structure and has a non-insulating member. The first effective impurity concentration of the non-insulating film is lower than a second effective impurity concentration of the semiconductor pillar.


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