The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 2014

Filed:

Apr. 27, 2012
Applicants:

Tsung-hsien Hsu, Taichung Hsien, TW;

Hao-ju Fang, Taichung Hsien, TW;

Hsin-lung Chung, Taichung Hsien, TW;

Inventors:

Tsung-Hsien Hsu, Taichung Hsien, TW;

Hao-Ju Fang, Taichung Hsien, TW;

Hsin-Lung Chung, Taichung Hsien, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/552 (2006.01); H01L 21/56 (2006.01); H01L 23/556 (2006.01);
U.S. Cl.
CPC ...
H01L 23/552 (2013.01); H01L 23/556 (2013.01); H01L 2924/3025 (2013.01);
Abstract

A semiconductor package includes a substrate having opposite first and second surfaces and a ground layer therein. Further, the second surface has at least a recessed portion for exposing portions of the ground layer. The semiconductor package further includes a semiconductor chip disposed on the first surface of the substrate; an encapsulant formed on the first surface of the substrate for encapsulating the semiconductor chip; and a metal layer covering the encapsulant and the substrate and extending to the recessed portion for electrically connecting the ground layer. As such, the space for circuit layout is increased and the circuit layout flexibility is improved.


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