The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 17, 2014
Filed:
Aug. 11, 2011
David G. Brochu, Jr., Hardwick, VT (US);
Fen Chen, Williston, VT (US);
Roger A. Dufresne, Fairfax, VT (US);
Travis S. Merrill, Rutland, VT (US);
Michael A. Shinosky, Jericho, VT (US);
David G. Brochu, Jr., Hardwick, VT (US);
Fen Chen, Williston, VT (US);
Roger A. Dufresne, Fairfax, VT (US);
Travis S. Merrill, Rutland, VT (US);
Michael A. Shinosky, Jericho, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Test structures for simultaneously testing for electromigration or stress migration fails and time dependent dielectric breakdown fails in integrated circuits, test circuits using four test structures arranged as a bridge balance circuit and methods of testing using the test circuits. The electromigration or stress migration portions of the test structures include via chains of wire segments connected in series by electrically conductive vias, the wire segments formed in at least two adjacent wiring levels of an integrated circuit. The time dependent dielectric breakdown portions of the test structures include digitized wire structures in one of the at least two adjacent wiring levels adjacent to a less than whole portion of the wire segments in the same wiring level as the digitized wire structures.