The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 13, 2014
Filed:
Nov. 30, 2010
Chi-ming Chen, Zhubei, TW;
Chung-yi Yu, Hsin-Chu, TW;
Chia-shiung Tsai, Hsin-Chu, TW;
Ho-yung David Hwang, Hsinchu, TW;
Chi-Ming Chen, Zhubei, TW;
Chung-Yi Yu, Hsin-Chu, TW;
Chia-Shiung Tsai, Hsin-Chu, TW;
Ho-Yung David Hwang, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
Provided is a method of fabricating a semiconductor device. The method includes providing a silicon substrate having opposite first and second sides. At least one of the first and second sides includes a silicon (111) surface. The method includes forming a high coefficient-of-thermal-expansion (CTE) layer on the first side of the silicon substrate. The high CTE layer has a CTE greater than the CTE of silicon. The method includes forming a buffer layer over the second side of the silicon substrate. The buffer layer has a CTE greater than the CTE of silicon. The method includes forming a III-V family layer over the buffer layer. The III-V family layer has a CTE greater than the CTE of the buffer layer.