The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 29, 2014

Filed:

Jan. 01, 2013
Applicant:

Realtek Semiconductor Corp., HsinChu, TW;

Inventors:

Meng-Jung Lee, Taoyuan County, TW;

Ting-Hsiung Wang, Kaohsiung, TW;

Yu-Lan Lo, Hsinchu County, TW;

Shu-Yi Kao, Hsinchu County, TW;

Assignee:

Realtek Semiconductor Corp., Science Park, HsinChu, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit test model is generated according to a circuit connection net-list, an isolation cell topology, and a pin voltage information spec file, so that the procedure of generating the integrated circuit test model can be time-saving, efficient, and fool-proof. Besides, while tracing a current path of a node of the circuit connection net-list, the generated integrated circuit test model can be more precise if certain limitations are added.


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