The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 22, 2014

Filed:

Jul. 14, 2009
Applicants:

Hong Wan, Plymouth, MN (US);

Ryan W. Rieger, Brooklyn Center, MN (US);

Michael J. Bohlinger, Minnetonka, MN (US);

Inventors:

Hong Wan, Plymouth, MN (US);

Ryan W. Rieger, Brooklyn Center, MN (US);

Michael J. Bohlinger, Minnetonka, MN (US);

Assignee:

Honeywell International Inc., Morristown, NJ (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/488 (2006.01); H01L 21/768 (2006.01); H01B 5/00 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method to vertically bond a chip to a substrate is provided. The method includes forming a metal bar having a linear aspect on the substrate, forming a solder paste layer over the metal bar to form a solder bar, forming a plurality of metal pads on the substrate, and forming a solder paste layer over the plurality of metal pads to form a plurality of solder pads on the substrate. Each of the plurality of solder pads is offset from a long edge the solder bar by an offset-spacing. The chip to be vertically bonded to the substrate has a vertical-chip thickness fractionally less than the offset-spacing. The chip to be vertically bonded fits between the plurality of solder pads and the solder bar. The solder bar enables alignment of the chip to be vertically bonded.


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