The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 22, 2014

Filed:

Jun. 07, 2012
Applicants:

Minjung Kim, Kwang-ju, KR;

Daesik Choi, Seoul, KR;

Minwook Yu, Suwon-si, KR;

Yisu Park, Icheon-si, KR;

Inventors:

MinJung Kim, Kwang-ju, KR;

DaeSik Choi, Seoul, KR;

MinWook Yu, Suwon-si, KR;

YiSu Park, Icheon-si, KR;

Assignee:

Stats Chippac Ltd., Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of manufacture of an integrated circuit packaging system includes: providing a package substrate having a warpage-compensation zone with a substrate-interior layer exposed from a top substrate-cover, and the warpage-compensation zone having contiguous exposed portion of the substrate-interior layer over corner portions of the package substrate; connecting an integrated circuit die to the package substrate with an internal interconnect; and forming an encapsulation over the integrated circuit die, with the encapsulation directly on the substrate-interior layer in the warpage-compensation zone.


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Kim, MinJung. (2014). Integrated circuit packaging system with warpage preventing mechanism and method of manufacture thereof (U.S. Patent No. 8703535). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8703535

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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