The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 15, 2014
Filed:
Aug. 21, 2008
Kazuhiro Fujikawa, Osaka, JP;
Shin Harada, Osaka, JP;
Yasuo Namikawa, Osaka, JP;
Takeyoshi Masuda, Osaka, JP;
Kazuhiro Fujikawa, Osaka, JP;
Shin Harada, Osaka, JP;
Yasuo Namikawa, Osaka, JP;
Takeyoshi Masuda, Osaka, JP;
Sumitomo Electric Industries, Ltd., Osaka-shi, JP;
Abstract
The invention offers a method of producing a semiconductor device that can suppress the worsening of the property due to surface roughening of a wafer by sufficiently suppressing the surface roughening of the wafer in the heat treatment step and a semiconductor device in which the worsening of the property caused by the surface roughening is suppressed. The method of producing a MOSFET as a semiconductor device is provided with a step of preparing a wafermade of silicon carbide and an activation annealing step that performs activation annealing by heating the wafer. In the activation annealing step, the waferis heated in an atmosphere containing a vapor of silicon carbide generated from the SiC piece, which is a generating source other than the wafer