The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 01, 2014
Filed:
Jan. 14, 2008
Chien-ting Lin, Hsin-Chu, TW;
Li-wei Cheng, Hsin-Chu, TW;
Che-hua Hsu, Hsin-Chu Hsien, TW;
Guang-hwa MA, Hsinchu, TW;
Chin-sheng Yang, Hsin-Chu, TW;
Chien-Ting Lin, Hsin-Chu, TW;
Li-Wei Cheng, Hsin-Chu, TW;
Che-Hua Hsu, Hsin-Chu Hsien, TW;
Guang-Hwa Ma, Hsinchu, TW;
Chin-Sheng Yang, Hsin-Chu, TW;
United Microelectronics Corp., Science-Based Industrial Park, Hsin-Chu, TW;
Abstract
A method for manufacturing a CMOS device includes providing a substrate having a first active region and a second active region defined thereon, forming a first conductive type transistor and a second conductive type transistor respectively in the first and the second active regions, performing a salicide process, forming an ILD layer, performing a first etching process to remove a first gate of the first conductive type transistor and to form an opening while a high-K gate dielectric layer is exposed in a bottom of the opening, and forming at least a first metal layer in the opening.