The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 25, 2014

Filed:

Mar. 10, 2011
Applicants:

Yutaka Uematsu, Chiyoda-ku, JP;

Hideki Osaka, Chiyoda-ku, JP;

Satoshi Nakamura, Chiyoda-ku, JP;

Satoshi Muraoka, Chiyoda-ku, JP;

Mitsuaki Katagiri, Chuo-ku, JP;

Ken Iwakura, Chuo-ku, JP;

Yukitoshi Hirose, Chuo-ku, JP;

Inventors:

Yutaka Uematsu, Chiyoda-ku, JP;

Hideki Osaka, Chiyoda-ku, JP;

Satoshi Nakamura, Chiyoda-ku, JP;

Satoshi Muraoka, Chiyoda-ku, JP;

Mitsuaki Katagiri, Chuo-ku, JP;

Ken Iwakura, Chuo-ku, JP;

Yukitoshi Hirose, Chuo-ku, JP;

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An interposer to be mounted with an integrated circuit to be a test object is provided with a switch and a probe to detect an electric current corresponding to individual terminals of the integrated circuit. A test pattern signal is then inputted to the integrated circuit through a test substrate as a switch that is connected to a power supply terminal of the integrated circuit and that is turned off. If the integrated circuit normally operates and the current values of all the terminals of the integrated circuit are within a tolerance, the power supply terminal connected to the turned-off switch is identified as a terminal that may be removed.


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