The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 18, 2014

Filed:

Jul. 26, 2010
Applicants:

Yuichiro Ikeda, Hyogo, JP;

Kazuhiko Shimakawa, Osaka, JP;

Yoshihiko Kanzawa, Osaka, JP;

Shunsaku Muraoka, Osaka, JP;

Yoshikazu Katoh, Osaka, JP;

Inventors:

Yuichiro Ikeda, Hyogo, JP;

Kazuhiko Shimakawa, Osaka, JP;

Yoshihiko Kanzawa, Osaka, JP;

Shunsaku Muraoka, Osaka, JP;

Yoshikazu Katoh, Osaka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0002 (2013.01); G11C 13/0069 (2013.01);
Abstract

A variable resistance nonvolatile memory device includes a plurality of memory cells in each of which a variable resistance element and a current steering element having two terminals are connected in series. Additionally, a current limit circuit limits a first current flowing in a direction for changing the memory cells to a low resistance state, and a boost circuit increases, when one of the memory cells changes to the low resistance state, the first current in a first period before the memory cell changes to the low resistance state.


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