The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 18, 2014
Filed:
Oct. 17, 2011
Naoyoshi Kusaba, Hopewell Junction, NY (US);
Oh-jung Kwon, Hopewell Junction, NY (US);
Zhengwen LI, Danbury, CT (US);
Hongwen Yan, Somers, NY (US);
Naoyoshi Kusaba, Hopewell Junction, NY (US);
Oh-jung Kwon, Hopewell Junction, NY (US);
Zhengwen Li, Danbury, CT (US);
Hongwen Yan, Somers, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
An array or moat isolation structure for eDRAM and methods of manufacture is provided. The method includes forming a deep trench for a memory array and an isolation region. The method includes forming a node dielectric on exposed surfaces of the deep trench for the memory array and the isolation region. The method includes filling remaining portions of the deep trench for the memory array with a metal, and lining the deep trench of the isolation region with the metal. The method includes filling remaining portions of the deep trench for the isolation region with a material, on the metal within the deep trench for the memory array. The method includes recessing the metal within the deep trench for the memory array and the isolation region. The metal in the deep trench of the memory array is recessed to a greater depth than the metal in the isolation region.