The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 18, 2014
Filed:
Jul. 09, 2012
Witold P. Maszara, Morgan Hill, CA (US);
Ajey P. Jacob, Albany, NY (US);
Nicholas V. Licausi, Watervliet, NY (US);
Jody A. Fronheiser, Delmar, NY (US);
Kerem Akarvardar, Saratoga Springs, NY (US);
Witold P. Maszara, Morgan Hill, CA (US);
Ajey P. Jacob, Albany, NY (US);
Nicholas V. LiCausi, Watervliet, NY (US);
Jody A. Fronheiser, Delmar, NY (US);
Kerem Akarvardar, Saratoga Springs, NY (US);
GLOBALFOUNDRIES Inc., Grand Cayman, KY;
Abstract
One method involves providing a substrate comprised of first and second semiconductor materials, performing an etching process through a hard mask layer to define a plurality of trenches that define first and second portions of a fin for a FinFET device, wherein the first portion is the first material and the second portion is the second material, forming a layer of insulating material in the trenches, performing a planarization process on the insulating material, performing etching processes to remove the hard mask layer and reduce a thickness of the second portion, thereby defining a cavity, performing a deposition process to form a third portion of the fin on the second portion, wherein the third portion is a third semiconducting material that is different from the second material, and performing a process such that a post-etch upper surface of the insulating material is below an upper surface of the third portion.