The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 25, 2014

Filed:

Sep. 30, 2009
Applicants:

Rajit Manohar, Ithaca, NY (US);

Gael Paul, Aix-en-Provence, FR;

Raymond Nijssen, San Jose, CA (US);

Marcel Van Der Goot, Pasadena, CA (US);

Clinton W. Kelly, San Jose, CA (US);

Virantha Ekanayake, San Jose, CA (US);

Inventors:

Rajit Manohar, Ithaca, NY (US);

Gael Paul, Aix-en-Provence, FR;

Raymond Nijssen, San Jose, CA (US);

Marcel Van der Goot, Pasadena, CA (US);

Clinton W. Kelly, San Jose, CA (US);

Virantha Ekanayake, San Jose, CA (US);

Assignee:

Achronix Semiconductor Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods, systems, and circuits that implement timing analyses of an asynchronous system are described. A method may include converting a synchronous circuit design into an asynchronous representation, wherein a critical path may be identified. The critical path may be converted to a corresponding path in the synchronous circuit design. Additional methods, systems, and circuits are disclosed.


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