The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 17, 2013
Filed:
Mar. 24, 2011
Chieh-chih Chen, Hsinchu County, TW;
Cheng-chi Lin, Toucheng Township, Yilan County, TW;
Chen-yuan Lin, Taitung, TW;
Shih-chin Lien, New Taipei, TW;
Shyi-yuan Wu, Hsinchu, TW;
Chieh-Chih Chen, Hsinchu County, TW;
Cheng-Chi Lin, Toucheng Township, Yilan County, TW;
Chen-Yuan Lin, Taitung, TW;
Shih-Chin Lien, New Taipei, TW;
Shyi-Yuan Wu, Hsinchu, TW;
Macronix International Co., Ltd., Hsinchu, TW;
Abstract
An ultra-high voltage n-type-metal-oxide-semiconductor (UHV NMOS) device with improved performance and methods of manufacturing the same are provided. The UHV NMOS includes a substrate of P-type material; a first high-voltage N-well (HVNW) region disposed in a portion of the substrate; a source and bulk p-well (PW) adjacent to one side of the first HVNW region, and the source and bulk PW comprising a source and a bulk; a gate extended from the source and bulk PW to a portion of the first HVNW region, and a drain disposed within another portion of the first HVNW region that is opposite to the gate; a P-Top layer disposed within the first HVNW region, the P-Top layer positioned between the drain and the source and bulk PW; and an n-type implant layer formed on the P-Top layer.