The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 2013

Filed:

Sep. 14, 2012
Applicants:

Han-guan Chew, Singapore, SG;

Ming Zhu, Singapore, SG;

Lee-wee Teo, Singapore, SG;

Harry-hak-lay Chuang, Hsinchu, TW;

Inventors:

Han-Guan Chew, Singapore, SG;

Ming Zhu, Singapore, SG;

Lee-Wee Teo, Singapore, SG;

Harry-Hak-Lay Chuang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01);
U.S. Cl.
CPC ...
Abstract

This description relates to a method for fabricating an interconnection structure in a complementary metal-oxide-semiconductor (CMOS). The method includes forming a first opening in a dielectric layer over a substrate and partially filling the first opening with a second work-function metal layer, wherein a top surface of the second work-function metal layer is below a top surface of the first opening. The method further includes forming a second opening adjoining the first opening in the dielectric layer over the substrate and depositing a first work-function metal layer in the first and second openings, whereby the first work-function metal layer is over the second work-function metal layer in the first opening. The method further includes depositing a signal metal layer over the first work-function metal layer in the first and second openings and planarizing the signal metal layer.


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